π§΅ How to make simple cable drawings using Wireviz (detailed manual)?
Introduction
If you designing electronic devices sooner or later you need a cables for connection any external modules (sensors, buttons, lights...) π
High-level developers have a full assembly of device, including each cable drawing with each wire, terminal, housing, terminals. |
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β‘ But for DIY or small project we can't afford it, so for documentation you can take a look at the light text-base tool Wireviz.
Installing
1) Install Python on your system (if not installed):
2) Open the command prompt (Win + R β type cmd):
cmd
Install WireViz with following command:
pip3 install wireviz
3) Download GraphViz (required for WireViz to generate graphics).Β
![]() | β If GraphViz not installed you'll get error: failed to execute WindowsPath('dot'), make sure the GraphViz executables are on your system PATH |
To make it open official site and download the latest version:
Unzip downloaded archive:
Press Win and search for Edit the system environmental variables:
Open System Properties and press on Environmental Variables:
In theSystem variables list find Path, click on it and press Edit...
Then press New and specify path to the earlier unzipped folder with software:
To verify, run:
wireviz --version
β Installation was successful, the installed version of WireViz is visible in the terminal.
Example
This is a simple custom cable forΒ oscilloscope that I typically use for pin headers, wires or low-frequency signals:It's pretty clear how to make it using ordinary table, but remember, that is just example and special drawing will be much more technically correct:
BNC | 28AWG RD | RED CLIP |
28AWG YE | BLACK CLIP |
Using
Open any folder and download or create (Right Click -> New -> Text Document) a .yml file there called WRD.yml with the following content:
metadata: title: BNC <-> CLIPS pn: DEV-CBL-001-R01 authors: Created: name: Refcircuit.Com Approved: name: Refcircuit.Com revisions: A: name: Refcircuit.Com changelog: Initial commit template: name: din-6771 sheetsize: A3 connectors: X_CLIP_VCC: &clip_t # https://lcsc.com/product-detail/Banana-Connectors-Alligator-Clips_Changzhou-Amass-Elec-20-135-1_C99180.html pinlabels: [VCC] type: Test Clip Red Banana Connectors manufacturer: Changzhou Amass Elec mpn: 20.135.1 supplier: lcsc.com spn: C99180 subtype: male color: RD image: src: IMG/20.135.1.png X_CLIP_GND: # https://lcsc.com/product-detail/Banana-Connectors-Alligator-Clips_Changzhou-Amass-Elec-20-135-2_C99181.html <<: *clip_t pinlabels: [GND] type: Test Clip Black Banana Connector mpn: 20.135.2 spn: C99181 color: BK image: src: IMG/20.135.2.png X_BNC_SCREW: # https://grobotronics.com/bnc-connector-male-screw-terminal.html pinlabels: [VCC, GND] type: BNC Connector Male - Screw Terminal manufacturer: PRC mpn: 20.135.1 supplier: grobotronics.com spn: 39-00011844 subtype: male color: BK image: src: IMG/BNC-SCREW-TERM-MALE.png cables: C: colors: [RD, BK] # number of wires implicit in color list gauge: 0.25 mm2 # also accepts AWG as unit show_equiv: true # auto-calculate AWG equivalent from metric gauge length: 0.4 # length in m shield: false mpn: UL1007-24AWG connections: - - X_BNC_SCREW: [1] - C.C1: [1] - X_CLIP_VCC: [1] - - X_BNC_SCREW: [2] - C.C1: [2] - X_CLIP_GND: [1]
Also create an IMG folder and add the .png images of used parts there (this is optional):
Next, in the path line, write cmd and press Enter to open the terminal directly in the folder (so that you donβt have to specify the path manually):
Write the name of the script and the name of the file together with the extension, press Enter:
wireviz WRD.yml
Several files should be generated, as indicated by the message in the terminal window and the files themselves:
Let's check them, they all open and can already be used (.pdf):
Download Example
- GitHub: https://github.com/Egoruch/WIREVIZ-BNC-CLIP-CABLE
- Server (directly): wireviz_wiring_diagram.zip
Conclusions
π’ | Technical documenting is very important for precise and high repeatability |
π’ | Because Wireviz it's text-made the generated result (drawing) looks very similar to from any engineer |
π | You should often generate drawing to check result because it's pretty easy to make mistake in .yml file |
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